Can a compiler spend HDC's accuracy budget? Reviewing ApproxHDC
How ApproxHDC searches application, compiler, and simulated-hardware choices to trade HDC task quality for speed and energy efficiency, and what the reported evidence establishes.
Research
Research perspectives
R&D is a strong focus of our work at HDC Labs. We examine research across HDC, graph intelligence and deep learning, develop our own perspective, and explore how those ideas translate into building practical systems.
Research
Showing 6–9 of 9 posts
Can hypervectors learn the hardware they run on?
How learnable HDC encoders can adapt similarity geometry to modeled compute-in-memory nonlinearities, and what the current evidence establishes.
What does an HDC graph encoder remember? Reviewing GraphHD-Order
A close look at what GraphHD and GraphHD-Order preserve, what the reported results establish, and what the released implementation leaves unresolved.
A brief history of vector symbolic architectures
How the problem of representing structured knowledge in distributed systems gave rise to the family now known as HDC and VSA.
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